Testing of Interposer-Based 2.5D Integrated Circuits
This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.
*An electronic version of a printed book that can be read on a computer or handheld device designed specifically for this purpose.
Formats for this Ebook
|Required Software||Any PDF Reader, Apple Preview|
|Supported Devices||Windows PC/PocketPC, Mac OS, Linux OS, Apple iPhone/iPod Touch.|
|# of Devices||Unlimited|
|Flowing Text / Pages||Pages|
|The message text*:|
Practical Digital Signal Processing (Indian Society for Non-Destructive Testing - National Certification Board Series)